1. Field of the Invention
The present invention relates to integrated circuits including interconnection structures and, more particularly, to a damascene structure defining conductive paths and/or vias between metal layers and a method of fabricating same.
2. Description of the Background Art
Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components.
As the dimensions of the integrated circuit components are reduced (e.g., sub-micron dimensions), the materials used to fabricate such components contribute to their electrical performance. For example, low resistivity metal interconnects (e.g., copper (Cu) and aluminum (Al)) provide conductive paths between the components on integrated circuits. Typically, the metal interconnects are electrically isolated from each other by an insulating material. When the distance between adjacent metal interconnects and/or the thickness of the insulating material has sub-micron dimensions, capacitive coupling potentially occurs between such interconnects. Capacitive coupling between adjacent metal interconnects may cause cross-talk and/or resistance-capacitance (RC) delay which degrades the overall performance of the integrated circuit.
In order to minimize capacitive coupling between adjacent metal interconnects, low dielectric constant bulk insulating materials (e.g., dielectric constants less than about 3.0) are needed. Examples of low dielectric constant bulk insulating materials include organosilicates, carbon-doped silicon oxides and carbon-doped fluorosilicate glass (FSG), among others.
In addition, a barrier layer often separates the metal interconnects from the bulk insulating materials. The barrier layer minimizes the diffusion of the metal from the interconnects into the bulk insulating material. Diffusion of the metal from the interconnects into the bulk insulating material is undesirable because such diffusion can affect the electrical performance of the integrated circuit (e.g., cross-talk and/or RC delay), or render it inoperative. Silicon carbide is often used as a barrier material in conjunction with low dielectric constant bulk insulating materials.
Some integrated circuit components may also include damascene structures. Damascene structures are multilevel interconnect structures that typically include two or more bulk insulating material layers and barrier layers stacked one on top of another. The multiple layers of bulk insulating material and barrier material are patterned to define vias and trenches through selected portions thereof. However, when organic or carbon-containing material layers are used for both the bulk insulating material and the barrier material, the etch selectivity of one to the other is poor using conventional fluorine-based etch chemistries. Poor etch selectivity between the bulk insulating material and the barrier material may undesirably form vias and trenches with larger than desired dimensions.
Therefore, a need exists for etch chemistries having good etch selectivity with respect to both bulk insulating materials and barrier materials for use in damascene structures.